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Brad Hutchings Picture

Brad Hutchings

Professor
Faculty

Office: 450H EB

Biography

Brad Hutchings received his PhD in Computer Science at the University of Utah in 1992 and is currently a professor at Brigham Young University (BYU). He established the Reconfigurable Computing Laboratory at BYU in 1993. During 1998, Dr. Hutchings was a visiting scholar at HP Labs in Bristol England where he was part of a group that designed and studied reconfigurable devices for portable appliances. From 2003 - 2007, he worked as a director at Tabula, a Bay-Area startup that he helped to found. He has published widely in the reconfigurable-computing community and regularly consults with industry. He serves on the committees of many of the conferences related to reconfigurable computing and FPGAs. His research interests are in programmable devices and architectures, tool flows, debugging strategies, and parallel computation.

Publications

  • , Adam Hastings, Jensen, Sean, Goeders, Jeffrey Brant, & Hutchings, Brad L. (2 July (3rd Quarter/Summer) 2018). Assuring 3rd-Party IP for Modern FPGAs through Functional Comparison. Conference Proceedings. International Verification and Security Workshop, .
  • Goeders, Jeffrey Brant, Gaskin, Tanner, & Hutchings, Brad L. (April (2nd Quarter/Spring) 2018). Demand Driven Assembly of FPGA Configurations Using Partial Reconfiguration, Ubuntu Linux, and PYNQ. Conference Proceedings. International Symposium on Field-Programmable Custom Computing Machines, .
  • Hutchings, Brad L, & Wirthlin, Michael J. (September 2017). Rapid Implementation of a Partially Reconfigurable Video System with PYNQ. Conference Proceedings. 27th International Conference on Field-Programmable Logic and Applications, . , 1-8. doi:10.23919/FPL.2017.8056845
  • Hutchings, Brad L, & Schultz, Stephen Marshall. (June 2017). Project Based Learning Curriculum for the Junior Year Based on Building a Laser Tag System. Conference Proceedings. ASEE Annual Conference, . , 1-24.
  • Haroldson, Travis, Nelson, Brent Edwin, & Hutchings, Brad L. (8 December 2016). Packing a Modern Xilinx FPGA with RapidSmith. Conference Proceedings. 2016 International Conference on Reconfigurable Computing and FPGAs, IEEE. , 1-8.
  • Monson, Joshua S, & Hutchings, Brad L. (December 2015). Using shadow pointers to trace C pointer values in FPGA circuits. Conference Proceedings. (ReConFig), 2015 International Conference on, IEEE. , 6. doi:10.1109/ReConFig.2015.7393364
  • Monson, Joshua, & Hutchings, Brad L. (December 2015). Using source-to-source compilation to instrument circuits for debug with High Level Synthesis. Conference Proceedings. Field Programmable Technology (FPT), 2015 International Conference on, IEEE. doi:10.1109/FPT.2015.7393129
  • Haroldson, Travis, Hutchings, Brad L, & Nelson, Brent Edwin. (February 2015). RapidSmith 2: A Framework for BEL-level CAD Exploration on Xilinx FPGAs. Conference Proceedings. FPGA'15 Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, ACM. , 66-69. doi:10.1145/2684746.2689085 isbn:978-1-4503-3315-3
  • Monson, Joshua S, & Hutchings, Brad L. (February 2015). Using Source-Level Transformations to Improve High-Level Synthesis Debug and Validation on FPGAs. Conference Proceedings. FPGA'15 Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, ACM. , 5-8. doi:10.1145/2684746.2689087
  • Monson, Joshua, & Hutchings, Brad L. (September 2014). New Approaches for in-system debug of behaviorally-synthesized FPGA circuits. Conference Proceedings. Field Programmable Logic and Applications (FPL), 2014 24th International Conference on, . , 6.
  • Hutchings, Brad L, & Keeley, Jared. (May 2014). Rapid Post-Map Insertion of Embedded Logic Analyzers for Xilinx FPGAs. Conference Proceedings. Field Programmable Custom Computing Machines (FCCM) 2014, IEEE.
  • Hutchings, Brad L, Monson, Joshua, Savory, Danny, & Keely, Jared. (February 2014). A Power-Side Channel Digital to Analog Converter for Xilinx FPGAs. Conference Proceedings. 2014 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, ACM. doi:10.1145/2554688.2554770
  • Monson, Josh, Wirthlin, Michael J, & Hutchings, Brad L. (December 2013). Optimization techniques for a high level synthesis implementation of the Sobel filter. Conference Proceedings. Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference on , IEEE. , 1-6. doi:10.1109/ReConFig.2013.6732315
  • Lavin, Chris, Nelson, Brent Edwin, & Hutchings, Brad L. (December 2013). Improving Clock Rate of Hard-Macro Designs. Conference Proceedings. 2103 International Conference on Field Programmable Technology, IEEE. doi:10.1109/FPL.2013.6645510
  • Nelson, Brent Edwin, Hutchings, Brad L, & Lavin, Christopher. (September 2013). Impact of Hard Macro Size on FPGA Clock Rate and Place/Route Time. Conference Proceedings. Proceedings of the 23rd International Conference on Field Programmable Logic and Applications (FPL), . doi:10.1109/FPL.2013.6645510
  • Monson, Josh, Wirthlin, Michael J, & Hutchings, Brad L. (June 2013). Implementing high-performance, low-power FPGA-based optical flow accelerators in C. Conference Proceedings. Application-Specific Systems, Architectures and Processors (ASAP), IEEE. , 363-369.
  • Lavin, C, Padilla, M, Lamprecht, J, Lundrigan, Philip Brandon, Nelson, Brent Edwin, Hutchings, Brad L, & Wirthlin, Michael J. (2012). RapidSmith--A Library for Low-level Manipulation of Partially Placed-and-Routed FPGA Designs. Journal Article, Academic Journal. Technical Report, Dept. of Elec. and Comp. Eng., Brigham Young University.
  • Hutchings, Brad L, & Lamprecht, Jaren. (September 2012). Profiling FPGA Floor-Planning Effects on Timing Closure. Conference Proceedings. Proceedings of Field Programmable Logic and Applications, . , 151-156.
  • Monson, Joshua S, Wirthlin, Michael J, & Hutchings, Brad L. (December 2011). A Fault Injection Analysis of Linux Operating on an FPGA-Embedded Platform. Journal Article, Academic Journal. International Journal of Reconfigurable Computing, Hindawi. 2012 , Article ID 850487, 11 pages.
  • Hutchings, Brad L, Nelson, Brent Edwin, Lavin, Chris, Lamprecht, Jaren, Padilla, Mark, & Lundrigan, Phillip. (December 2011). RapidSmith: Do-It-Yourself CAD Tools for Xilinx FPGAs. Conference Proceedings. Proceedings on 2011 International Conference on Field Programmable Logic (FPL'11), IEEE Computer Society, Los Alamitos, California, USA. , 349-355.
  • Lavin, Christopher, Padilla, Marc, Lamprecht, Jaren, Lundrigan, Philip Brandon, Nelson, Brent Edwin, & Hutchings, Brad L. (2011). HMFlow: accelerating FPGA compilation with hard macros for rapid prototyping. Conference Proceedings. Field-Programmable Custom Computing Machines (FCCM), 2011 IEEE 19th Annual International Symposium on, . , 117--124.
  • Lavin, Christopher, Padilla, Marc, Lamprecht, Jaren, Lundrigan, Philip Brandon, Nelson, Brent Edwin, & Hutchings, Brad L. (2011). Rapidsmith: Do-it-yourself cad tools for xilinx fpgas. Conference Proceedings. Field Programmable Logic and Applications (FPL), 2011 International Conference on, . , 349--355.
  • Hutchings, Brad L, Nelson, Brent Edwin, Lavin, Chris, Lamprecht, Jaren, Padilla, Mark, & Lundrigan, Phillip. (May 2011). HM Flow: Accelerating FPGA Compilation with Hard Macros for Rapid Prototyping. Conference Proceedings. 2011 IEEE Annual Symposium on Field Programmable Computing Machines (FCCM), IEEE, USA. , 117-124.
  • Monson, Joshua, Hutchings, Brad L, & Wirthlin, Michael J. (December 2010). Fault Injection Results of Linux Operating on an FPGA Embedded Platform. Conference Proceedings. Proceedings of Reconfig 2010 International Conference on Reconfigurable Computing and FPGAs, IEEE. , 37-42.
  • Lavin, Cristopher, Padilla, Marc, Lamprecht, Jaren, Lundrigan, Philip, Nelson, Brent Edwin, & Hutchings, Brad L. (December 2010). Rapid Prototyping Tools for FPGA Designs: RapidSmith. Conference Proceedings. Proceedings of the 2010 International Conference on Field-Programmable Technology, .
  • Lavin, Christopher, Padilla, Marc, Lundrigan, Philip Brandon, Nelson, Brent Edwin, & Hutchings, Brad L. (2010). Rapid prototyping tools for FPGA designs: RapidSmith. Conference Proceedings. Field-Programmable Technology (FPT), 2010 International Conference on, . , 353--356.
  • Lavin, Chris, Padilla, Marc, Ghosh, Subhrashankha, Nelson, Brent Edwin, Hutchings, Brad L, & Wirthlin, Michael J. (August 2010). Using Hard Macros to Reduce FPGA Compilation Time. Conference Proceedings. 2010 International Conference on Field Programmable Logic and Applications, IEEE. , 438-441.
  • Hutchings, Brad L, Nelson, Brent Edwin, West, Stephen, & Curtis, Reed. (August 2009). Comparing fine-grained performance on the Ambric MPPA against an FPGA. Conference Proceedings. International Conference on Field Programmable Logic and Applications, 2009 (FPL 2009), . , 174-179.
  • Hutchings, Brad L, Nelson, Brent Edwin, West, Stephen, & Curtis, Reed. (August 2009). Comparing Fine-Grained Performance on the Ambric MPPA Against an FPGA. Conference Proceedings. Proceedings of the 19th International Conference on Field Programmable Logic and Applications (FPL'2009), .
  • Hutchings, Brad L, Nelson, Brent Edwin, West, S., & Curtis, R.. (April (2nd Quarter/Spring) 2009). Implementing Optical Flow on the Ambric AM2045 MPAA. Conference Proceedings. Proc. of 16th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), .
  • Hutchings, Brad L, Nelson, Brent Edwin, West, Stephen, & Curtis, Reed. (April (2nd Quarter/Spring) 2009). Optical Flow on the Ambric Massively Parallel Processor Array (MPPA). Conference Proceedings. Proceedings of 2009 17th IEEE Symposium on Field Programmable Custom Computing Machines, . , 141-148.

  • Nelson, Brent Edwin, Hutchings, Brad L, & Wirthlin, Michael J. (November 2008). Design, Debug, Deploy: The Creation of Configurable Computing Application. Journal Article, Academic Journal. Journal of Signal Processing Systems, . 53 , 187-196.
  • Nelson, Brent Edwin, Hutchings, Brad L, & Wirthlin, Michael J. (November 2008). Design, Debug, Deploy: The Creation of Configurable Computing Applications. Journal Article, Academic Journal. Journal of Signal Processing Systems, Springer, New York. 53 , 187-196.

  • Nelson, Brent Edwin, Hutchings, Brad L, & Wirthlin, Michael J. (November 2008). Design, Debug, Deploy: The Creation of Configurable Computing Applications. Journal Article, Academic Journal. Journal of Signal Processing Systems, . 53 , 187-196.
  • Nelson, Brent Edwin, Wirthlin, Michael J, Hutchings, Brad L, Athanas, Peter, & Bohner, Shawn. (July (3rd Quarter/Summer) 2008). Design Productivity for Configurable Computing. Conference Proceedings. roceedings of The International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA'2008), .
  • Nelson, Brent Edwin, Wirthlin, Michael J, Hutchings, Brad L, Athanas, Peter, & Bohner, Shawn. (July (3rd Quarter/Summer) 2008). Design Productivity for Configurable Computing. Conference Proceedings. Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA 2008), . , 57-66.
  • Nelson, Brent Edwin, Wirthlin, Michael J, Hutchings, Brad L, Athanas, Peter, & Bohner, Shawn. (July (3rd Quarter/Summer) 2008). Design Productivity for Configurable Computing. Conference Proceedings. Proceedings of The International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA'2008), .
  • Hutchings, Brad L, & Nelson, Brent Edwin. (December 2007). Implementing Applications with FPGAs. Book, Chapter/ Section in Scholarly Book. Reconfigurable Computing, Morgan Kaufman. , 26.
  • Nelson, Brent Edwin, & Hutchings, Brad L. (December 2007). The JHDL Design and Debug System. Book, Chapter/ Section in Scholarly Book. Reconfigurable Computing, Morgan Kaufman. , 19.
  • Nelson, Brent Edwin, & Hutchings, Brad L. (November 2007). Chapter 11: JHDL. Book, Chapter/ Section in Scholarly Book. Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation, Elsevier. , 20.
  • Hutchings, Brad L, & Nelson, Brent Edwin. (November 2007). Chapter 18 - Evaluating and Optimizing problems for FPGA implementations. Book, Chapter/ Section in Scholarly Book. Reconfigurable Computing: The Theory and Practice of FPGA-Based Computing, Elsevier. , 20.
  • Hutchings, Brad L, & Nelson, Brent Edwin. (January (1st Quarter/Winter) 2004). GigaOp DSP on FPGA. Journal Article, Academic Journal. The Journal of VLSI Signal Processing, . 36 , 41-55.
  • . (April (2nd Quarter/Spring) 2003). Source Level Debugger for the Sea Cucumber Synthesizing Compiler. Journal Article, Academic Journal. Proceedings of IEEE Workshop on FPGAs for Custom Computing Machines, , Napa, CA. , 228-238.
  • . (August 2002). Sea Cucumber: A Synthesizing Compiler for FPGAs. Journal Article, Academic Journal. Proceedings of the12th International Conference on Field-Programmable Logic and Applications, , London, UK.
  • . (April (2nd Quarter/Spring) 2002). Assisting Network Intrusion Detection with Reconfigurable Hardware. Journal Article, Academic Journal. Proceedings of IEEE Workshop on FPGAs for Custom Computing Machines, , Napa, CA. , 111-121.
  • . (August 2001). Synthesizing rtl hardware from java byte codes. Journal Article, Academic Journal. Field Programable Logic and Applications Conference 11th Lecture Notes in Computer Science, , Belfast, Ireland. , 123-132.
  • . (August 2001). Using design-level scan to improve fpga design observability and controllability for functional verification. Journal Article, Academic Journal. Field Programable Logic and Applications Conference 11th Lecture Notes in Computer Science, , Belfast, Ireland. , 483-492.
  • . (May 2001). Gigaop DSP on FPGA. Journal Article, Academic Journal. Proceedings of ICASSP, IEEE International Conference on Acoustics, Speed and Signal Processing, , Salt Lake City, UT. , 885-888.
  • . (April (2nd Quarter/Spring) 2001). An Application-Specific Compiler for High-Speed Binary Image Morphology. Journal Article, Academic Journal. Proceedings of the IEEE Symposium on FPGAs for Custom Computing Machines, . , 199-208.
  • . (April (2nd Quarter/Spring) 2001). An application-specific compiler for highspeed binary image morphology. Journal Article, Academic Journal. Proceedings of IEEE Workshop on FPGAs for Custom Computing Machines, , Napa, CA.
  • . (April (2nd Quarter/Spring) 2001). Instrumenting bitstreams for debugging FPGA circuits. Journal Article, Academic Journal. Proceedings of IEEE Workshop on FPGAs for Custom Computing Machines, .
  • . (February 2001). Unifying Simulation and Execution in a Design Environment for FPGA Systems. Abstract. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, . 9 , 201-205.
  • . (February 2001). Unifying simulation and execution in a design environment for FPGA systems. Journal Article, Academic Journal. IEEE Transactions in VLSI Systems, . 9 , 201-205.
  • . (October (4th Quarter/Autumn) 2000). Designing run-time reconfigurable applications. Journal Article, Academic Journal. Journal of VLSI Signal Processing, 2000, .
  • . (October (4th Quarter/Autumn) 2000). Using general-purpose languages for FPGA design. Journal Article, Academic Journal. Proceedings of the 37th Design Automation Conference (DAC), , Los Angeles, CA. , 561-566.
  • . (April (2nd Quarter/Spring) 2000). Improving the FPGA design process through determining and applying logical-to-physical design mappings. Journal Article, Academic Journal. Proceedings of IEEE Workshop on FPGAs for Custom Computing Machines, , Napa, CA. , 305-306.
  • . (January (1st Quarter/Winter) 2000). Designing and debugging custom computing applications. Journal Article, Academic Journal. IEEE Design and Test of Computers,, . 17 , 20-28.
  • . (October (4th Quarter/Autumn) 1999). Developing and debugging FPGA applications with JHDL. Journal Article, Academic Journal. Proceedings of the 33rd Asilomar Conference on Signals, Systems and Computers, , Asilomar, CA. , 554-558.
  • . (September 1999). Configurable computing - past, present and future. Journal Article, Academic Journal. Second Annual Military and Aerospace Applications of Programmable Devices and Technologies Conferenc, , Laurel, MD.
  • . (April (2nd Quarter/Spring) 1999). A CAD suite for high-performance fpga design. Journal Article, Academic Journal. Proceedings of IEEE Workshop on FPGAs for Custom Computing Machines, . , 12-24.
  • . (February 1999). A reconfigurable arithmetic array for multimedia applications. Journal Article, Academic Journal. ACM/SIGDA International Symposium on Field Programmable Gate Arrays, , Monterey, CA. , 135-143.
  • . (1998). Seeking solutions in configurable computing. Journal Article, Academic Journal. IEEE Computer, . 30 , 38-43.
  • . (September 1998). The flexibility of configurable computing. Journal Article, Academic Journal. IEEE Signal Processing, . 15 , 67-84.
  • . (June 1998). Improving functional density through run-time reconfiguration. Journal Article, Academic Journal. IEEE Transactions on VLSI Systems, . 6 , 247-256.
  • . (April (2nd Quarter/Spring) 1998). JHDL - an HDL for reconfigurable systems. Journal Article, Academic Journal. Proceedings of IEEE Workshop on FPGAs for Custom Computing Machines, , Napa, CA. , 175-184.
  • . (September 1997). Exploiting reconfigurability through domain-specific systems. Abstract. Field Programmable Logic and Applications, Proceedings 7th International Workshop, FPL '97, , London, UK. , 193-202.
  • . (April (2nd Quarter/Spring) 1997). Automated target recognition on splash 2. Journal Article, Academic Journal. proceedings of IEEE Workshop on FPGAs for Custom Computing Machines, , Napa, CA. , 192-2000.
  • . (April (2nd Quarter/Spring) 1997). Configurable computing: The road ahead. Journal Article, Academic Journal. 1997 Reconfigurable Architecture Workshop (RAW), , Geneva, Switzerland. , 81-96.
  • . (February 1997). Improving computational efficiency through run-time constant propagation. Abstract. aCM/SIGDA International Symposium on Field Programmable Gate Arrays, . , Monterey, CA.
  • . (1996). Run-time reconfiguration: A method for enhancingthe functional density of SRAM-based FPGAs. Journal Article, Academic Journal. Journal of VLSI Signal Processing, . 12 , 67-86.
  • . (April (2nd Quarter/Spring) 1996). Mixing fixed and reconfigurable logic for array processing. Journal Article, Academic Journal. IEEE Workshop on FPGAs for Custom Computing Machines, , Napa, CA. , 118-125.
  • . (April (2nd Quarter/Spring) 1996). Mixing fixed and reconfigurable logic for array processing. Journal Article, Academic Journal. IEEE Workshop on FPGAs for Custom Computing Machines, , Napa, CA. , 118-125.
  • . (April (2nd Quarter/Spring) 1996). Sequencing run-time reconfigured hardware with software. Journal Article, Academic Journal. ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, , Monterey, CA. , 122-128.
  • . (April (2nd Quarter/Spring) 1996). Supporting fpga microprocessors through retargetable software tools. Journal Article, Academic Journal. Proceedings of IEEE Workshop on FPGAs for Custom Computing Machines, , Napa, CA. , 195-203.
  • . (October (4th Quarter/Autumn) 1995). Designing a partially reconfigured system. Journal Article, Academic Journal. Proceedings Intelligent Systems and Advanced Manufacturing, SPIE Photonics East, , Philadelphia, PA. , 210-219.
  • . (October (4th Quarter/Autumn) 1995). The dynamic instruction set computer. Journal Article, Academic Journal. Proceedings Intelligent Systems and Advanced Manufacturing, SPIE Photonics East, , Philadelphia, PA. , 92-103.
  • . (August 1995). An assessment of the suitability of fpga-based systems for use in digital signal processing. Journal Article, Academic Journal. Field Programmable Logic and Applications, Proceedings 5th International Workshop, FPL '95, , Oxford, UK. , 293-302.
  • . (August 1995). Implementation approaches for reconfigurable logic applications. Journal Article, Academic Journal. Field Programmable Logic and Applications, Proceedings 5th International Workshop, FPL, , Oxford, UK. , 419-428.
  • . (April (2nd Quarter/Spring) 1995). A dynamic instruction set computer. Journal Article, Academic Journal. IEEE Workshop on FPGAs for Custom Computing Machines, , Napa, CA. , 99-107.
  • . (April (2nd Quarter/Spring) 1995). Design methodologies for partial reconfiguration. Journal Article, Academic Journal. IEEE Workshop on FPGAs for Custom Computing Machines, , Napa, CA. , 1995.
  • . (1994). Simplifying C++ code development with OrgC. Journal Article, Academic Journal. International Conference on Simulation in Engineering Education, , Tempe, AZ. , 43-48.
  • . (June 1994). Real-time control using tactile feedback and fuzzy logic. Journal Article, Academic Journal. Proceedings of the Third IEEE Conference on Fuzzy Systems. IEEE World Conference on Computational In, , Orlando, FL. , 1326-1331.
  • . (June 1994). RRANN: A hardware implementation of the backpropagation using reconfigurable FPGAs. Journal Article, Academic Journal. IEEE International Conference on Neural Networks. IEEE World Conference on Computational Intelligenc, , Orlando, FL. , 2097-2102.
  • . (May 1994). Multilayer cross-field ultrasonic tactile sensor. Journal Article, Academic Journal. IEEE International Conference on Robotics and Automation, , San Diego, CA. , 2522-2528.
  • . (May 1994). RRANN: The run-time reconfiguration artificial neural network. Journal Article, Academic Journal. Custom Integrated Circuits Conference, , San Diego. , 77-80.
  • . (April (2nd Quarter/Spring) 1994). Density enhancement of a neural network using FPGAs and run-time reconfiguration. Journal Article, Academic Journal. IEEE Workshop on FPGAs for Custom Computing Machines, , Napa, CA. , 180-188.
  • . (April (2nd Quarter/Spring) 1994). FPGA-based stochastic neural networks: Implementation. Journal Article, Academic Journal. Proceedings of IEEE Workshop on FPGAs for Custom Computing Machines, , Napa, CA. , 189-198.
  • . (April (2nd Quarter/Spring) 1994). The nano processor: A low resource reconfigurable processor. Journal Article, Academic Journal. Proceedings of IEEE Workshop on FPGAs for Custom Computing Machines, , Napa, CA. , 23-30.
  • . (January (1st Quarter/Winter) 1994). High-speed circuit design: CAD tools and computational challenges. Journal Article, Academic Journal. 27th Hawaii International Conference on System Sciences, , Wailea, HI. , 26-35.
  • . (October (4th Quarter/Autumn) 1993). Design and implementation of GaAs HBT circuits with ACME. Journal Article, Academic Journal. 5th Nasa Symposium on VLSI Design, , Albuquerque, NM. , 9.2.1-9.2.10.
  • . (1990). VLSI design and implementation of a real-time image segmentation processor. Journal Article, Academic Journal. Machine Vision and Applications, . 3 , 21-44.