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Electrical and Computer Engineering
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Publications

Journals:

  • E. Swindlehurst, H. Jensen, A. Petrie, Y. Song, Y. Kuan, M. Chang, J. Wu, and S. Chiang, “An 8-bit 10-GHz 21-mW time-interleaved SAR ADC with grouped DAC capacitors and dual-path bootstrapped switch,” IEEE Solid-State Circuits Letters (SSCL), vol. 2, no. 9, pp. 83-86, Sep. 2019. (Invited paper. No. 6 most-accessed paper in SSCL in Oct. 2019, Top 50 most-accessed paper in SSCL in Nov. 2019, Jan., Feb., and Mar. 2020) [Link]
  • D. Janke, A. Monk, E. Swindlehurst, K. Layton, and S. Chiang, “A 9-Bit 10-MHz 28-µW SAR ADC using tapered bit periods and a partially interdigitated DAC,” IEEE Trans. Circuits and Systems II (TCAS-II), vol. 66, no. 2, pp. 187-191, Feb. 2019. (No. 5 most-accessed paper in TCAS-II in Jun. 2018, Top 50 most-accessed paper in TCAS-II in Feb. 2019) [Link]
  • A. Galan, G. Nordin, and S. Chiang, “Design and characterization of a package-less hybrid PDMS-CMOS-FR4 contact-imaging system for microfluidic integration,” SPIE J. Micro/Nanolithography, MEMS, and MOEMS, vol. 17, no. 3, pp. 034501-1-034501-8, Jul. 2018. [Link]
  • N. Whitehead, Y. Song, and S. Chiang, “Direct measurement of high-gain and complementary charge-steering amplifiers,” IEEE Trans. Circuits and Systems II (TCAS-II), vol. 65, no. 6, pp. 714-718, Jun. 2018. [Link]
  • D. Bustamante, D. Janke, E. Swindlehurst, and S. Chiang, “High-precision, mixed-signal mismatch measurement of metal-oxide-metal capacitors,” IEEE Trans. Circuits and Systems II (TCAS-II), vol. 64, no. 11, pp. 1272-1276, Nov. 2017. (Top 50 most-accessed paper in TCAS-II in Nov. 2017) [Link]
  • W. Zhang, D. Comer, and S. Chiang, “Design of low power ultra-high voltage gain differential cascode stages,” International J. of Electronics, vol. 104, no. 6, pp. 982-992, Jun. 2017. [Link]
  • S. Chiang, “Comparator offset calibration using unbalanced clocks for high speed and high power efficiency,” IET Electronics Letters, vol. 52, no. 14, pp. 1206-1207, Jul. 2016. (Top 50 most-accessed paper in EL in Jul. 2016) [Link]
  • S. Chiang, “Charge-dumping switching scheme for successive-approximation-register analogue-to-digital converters,” IET Electronics Letters, vol. 52, no. 5, pp. 348-350, Mar. 2016. (Achieved the lowest switching energy and smallest DAC capacitance at the time of publication, Top 50 most-accessed paper in EL in Mar. 2016) [Link]
  • E. Swindlehurst and S. Chiang, “Histogram-based calibration of capacitor mismatch in SAR ADCs,” IET Electronics Letters, vol. 51, no. 25, pp. 2096-2098, Dec. 2015. [Link]
  • S. Chiang, H. Sun, and B. Razavi, “A 10-bit 800-MHz 19-mW CMOS ADC,” IEEE J. Solid-State Circuits (JSSC), pp. 935-949, Apr. 2014. (Invited paper. No. 1 most-accessed paper in JSSC in Mar. and Apr. 2014, Top 25 most-accessed paper in JSSC in May and Jun. 2014, Top 100 most-accessed paper in all IEEE journals in Mar., Apr., and May 2014) [Link]
  • S. Kleinfelder, S. Chiang, and W. Huang, “Multi-GHz synchronous waveform acquisition with real-time pattern-matching trigger generation,” IEEE Trans. Nuclear Science, pp. 3785-3792, Oct. 2013. [Link]
  • P. Nieva, J. Kuo, S. Chiang, and A. Syed, “A novel MOEMS pressure sensor: modeling and experimental evaluation,” Springer India, J. Sadhana, vol. 34, pp. 615-623, Aug. 2009. [Link]
  • S. Kleinfelder, S. Chiang, W. Huang, A. Shah, and K. Kwiatkowski, “High-speed, high dynamic-range optical sensor arrays,” IEEE Trans. Nuclear Science, vol. 56, pp. 1069-1075, Jun. 2009. [Link]

Conferences:

  • E. Swindlehurst, H. Jensen, A. Petrie, Y. Song, Y. Kuan, M. Chang, J. Wu, S. Chiang, “An 8-bit 10-GHz 21-mW Time-Interleaved SAR ADC with Grouped DAC Capacitors and Dual-Path Bootstrapped Switch,” IEEE European Solid-State Circuits Conference (ESSCIRC), Sep. 2019. (accepted)
  • E. Gustafson, H. Murray, Y. Song, J. Rozsa, S. Chiang, A. Hawkins, and D. Austin, “Charge detection mass spectrometry of microparticles using printed circuit board electrode arrays,” American Society for Mass Spectrometry (ASMS), Jun. 2019.
  • Y. Song, J. Chu, J. Magalhaes, J. Nowjack, J. Rozsa, E. Swindlehurst, S. Pant, K. Layton, X. Wang, N. Porter, E. Lee, S. Lammert, M. Lee, A. Hawkins, and S. Chiang, “High-pressure solid-state ion detector with 10 uV/e- gain and 180-e- noise,” American Society for Mass Spectrometry (ASMS), Jun. 2019.
  • D. Janke, A. Monk, E. Swindlehurst, K. Layton, and S. Chiang, “A 9-Bit 10-MHz 28-µW SAR ADC using tapered bit periods and a partially interdigitated DAC,” IEEE International Symp. Circuits and Systems (ISCAS), May 2019.
  • N. Whitehead, Y. Song, and S. Chiang, “Direct measurement of high-gain and complementary charge-steering amplifiers,” IEEE International Symp. Circuits and Systems (ISCAS), May 2018. [Media]
  • D. Bustamante, D. Janke, E. Swindlehurst, and S. Chiang, “High-precision, mixed-signal mismatch measurement of metal-oxide-metal capacitors,” IEEE International Symp. Circuits and Systems (ISCAS), May 2017.
  • S. Chiang, H. Sun, and B. Razavi, “A 10-bit 800-MHz 19-mW CMOS ADC,” Symp. VLSI Circuits Dig. Of Tech. Papers, pp. 100-101, Jun. 2013. (Achieved the best figure-of-merit of high-speed ADCs at the time of publication) [Link]
  • S. Chiang and S. Kleinfelder, “Scaling and design of a 16-mega-pixel CMOS image sensor for electron microscopy,” IEEE Nuclear Science Symp., pp. 1249-1256, Nov. 2009. [Link]
  • W. Huang, S. Chiang, and S. Kleinfelder, “Waveform digitization with programmable windowed real-time trigger capability,” IEEE Nuclear Science Symp., pp. 422-427, Nov. 2009. [Link]

Theses:

  • K. Gammoh, “PVT-tolerant stochastic time-to-digital converters”, M.S. Thesis, Brigham Young University, 2018.
  • A. Galan, “Design and evaluation of a CMOS contact-imaging system for microfluidics”, M.S. Thesis, Brigham Young University, 2017.
  • S. Chiang, “High-speed, low-power analog-to-digital converters,” Ph.D. Thesis, University of California, Los Angeles, 2013. [Link]
  • S. Chiang, “Design and scaling of a 16-mega-pixel CMOS image sensor for electron microscopy,” M.S. Thesis, University of California, Irvine, 2009. [Link]

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