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Ira A. Fulton College of Engineering
Electrical and Computer Engineering
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Jeff Goeders

Associate Professor
Curriculum Vitae
Faculty
Website: Jeff Goeders
Email: jgoeders@byu.edu

Office: 450I EB

Phone: (801) 422-3499

Biography

Dr. Jeff Goeders is an Associate Professor and the graduate coordinator in the Department of Electrical and Computer Engineering at BYU in Provo, Utah. He received his BASc degree in Computer Engineering from the University of Toronto, Canada, in 2010, and MASc and PhD degrees in Computer Engineering from The University of British Columbia, Vancouver, Canada, in 2012 and 2016. Prior to joining BYU, he worked at Bombardier Aerospace, PMC-Sierra, and Blackcomb Design Automation. His research interests focus on reconfigurable computing and embedded systems, with an emphasis on tools for FPGA security, debugging technologies, open-source hardware compilers, and embedded system reliability. He is a senior member of the IEEE and ACM.

Publications

  • Eli Cahill, Jeffrey Goeders, and Brad Hutchings (2022). Approaches for FPGA Design Assurance. ACM Transactions on Reconfigurable Technology and Systems (TRETS)
  • Hayden Cook, Jacob Arscott, Brent George, Tanner Gaskin, Jeffrey Goeders, and Brad Hutchings (2022). Inducing Non-Uniform FPGA Aging Using Configuration-Based Short Circuits. ACM Transactions on Reconfigurable Technology and Systems (TRETS)
  • Benjamin James, Michael Wirthlin, and Jeffrey Goeders (April 2021). Investigating How Software Characteristics Impact the Effectiveness of Automated Software Fault Tolerance. IEEE Transactions on Nuclear Science (TNS) vol. 68, no. 5, pp. 1014-1022
  • Benjamin James, and Jeffrey Goeders (February 2021). Automated Software Compiler Techniques to Provide Fault Tolerance for Real-Time Operating Systems. Design, Automation and Test in Europe Conference (DATE)
  • Tanner Gaskin, Hayden Cook, Wesley Stirk, Robert Lucas, Jeffrey Goeders, and Brad Hutchings (August 2020). Using Novel Configuration Techniques for Accelerated FPGA Aging. International Conference on Field-Programmable Logic and Applications (FPL)
  • Al-Shahna Jamal, Eli Cahill, Jeffrey Goeders, and Steven JE Wilton (Feb 2020). Fast Turnaround HLS Debugging using Dependency Analysis and Debug Overlays. ACM Transactions on Reconfigurable Technology and Systems (TRETS) vol. 13, no. 1, pp. 1-26
  • Benjamin James, Heather Quinn, Michael Wirthlin, and Jeffrey Goeders (January 2020). Applying Compiler-Automated Software Fault Tolerance to Multiple Processor Platforms. IEEE Transactions on Nuclear Science (TNS) vol. 67, no. 1, pp. 321-327
  • Matthew Ashcraft and Jeffrey Goeders (December 2019). Synchronizing On-Chip Software and Hardware Traces for HLS-Accelerated Programs. International Conference on Field Programmable Technology (FPT)
  • Daniel Holanda Noronha, Ruizhe Zhao, Zhiqiang Que, Jeffrey Goeders, Wayne Luk and Steve Wilton (December 2019). An Overlay for Rapid FPGA Debug of Machine Learning Applications. International Conference on Field Programmable Technology (FPT)
  • Wesley Stirk and Jeffrey Goeders (December 2019). Implementation and Design Space Exploration of a Turbo Decoder in High-Level Synthesis. International Conference on Reconfigurable Computing and FPGAs (ReConFig)
  • Daniel Holanda Noronha, Ruizhe Zhao, Jeffrey Goeders, Wayne Luk, and Steven J.E. Wilton (February 2019). On-chip FPGA Debug Instrumentation for Machine Learning Applications. International Symposium on Field-Programmable Gate Arrays (FPGA) pp. 110-115
  • Matthew Bohman, Benjamin James, Michael Wirthlin, Heather Quinn, and Jeffrey Goeders (January 2019). Microcontroller Compiler-Assisted Software Fault Tolerance. IEEE Transactions on Nuclear Science (TNS) vol. 66, no. 1, pp. 223-232
  • Matthew Ashcraft and Jeffrey Goeders (December 2018). Unified On-Chip Software and Hardware Debug for HLS-Accelerated Programs. International Conference on Field Programmable Technology (FPT) pp. 354-357
  • Jamal, Al-Shahna, Goeders, Jeffrey Brant, & Wilton, Steven J.E.. (August 2019). An FPGA Overlay Architecture Supporting Rapid Implementation of Functional Changes during On-Chip Debug. Conference Proceedings.
  • Noronha, Daniel Holanda, Zhao, Ruizhe , Goeders, Jeffrey Brant, Luk, Wayne, & Wilton, Steven J. E.. (February 2019). On-chip FPGA Debug Instrumentation for Machine Learning Applications. Conference Proceedings. International Symposium on Field-Programmable Gate Arrays (FPGA), .
  • Bohman, Matthew , James, Benjamin, Wirthlin, Michael J, Quinn, Heather, & Goeders, Jeffrey Brant. (No date available). Microcontroller Compiler-Assisted Software Fault Tolerance. Journal Article, Academic Journal. IEEE Transactions on Nuclear Science, .
  • Ashcraft, Matthew, & Goeders, Jeffrey Brant. (December 2018). Unified On-Chip Software and Hardware Debug for HLS-Accelerated Programs. Conference Proceedings. International Conference on Field-Programmable Technology (FPT), .
  • Jamal, Al-Shahna, Goeders, Jeffrey Brant, & , . (27 August 2018). An FPGA Overlay Architecture Supporting Rapid Implementation of Functional Changes during On-Chip Debug. Conference Proceedings. International Conference on Field Programmable Logic and Applications (FPL), .
  • Adam Hastings, Jensen, Sean, Goeders, Jeffrey Brant, & Hutchings, Brad L. (2 July (3rd Quarter/Summer) 2018). Assuring 3rd-Party IP for Modern FPGAs through Functional Comparison. Conference Proceedings. International Verification and Security Workshop, .
  • Goeders, Jeffrey Brant, Gaskin, Tanner, & Hutchings, Brad L. (April (2nd Quarter/Spring) 2018). Demand Driven Assembly of FPGA Configurations Using Partial Reconfiguration, Ubuntu Linux, and PYNQ. Conference Proceedings. International Symposium on Field-Programmable Custom Computing Machines, .
  • Jamal, Al-Shahna, Goeders, Jeffrey Brant, & Wilton, Steve. (February 2018). Architecture Exploration for HLS-Oriented FPGA Debug Overlays. Conference Proceedings. International Symposium on Field-Programmable Gate Arrays , ACM.
  • Bohman, Matthew, James, Benjamin, Wirthlin, Michael J, Quinn, Heather, & Goeders, Jeffrey Brant. (No date available). Microcontroller Compiler-Assisted Software Fault Tolerance. Conference Proceedings. IEEE Nuclear and Space Radiation Effects Conference, .
  • Bussa, Pavan Kumar, Goeders, Jeffrey Brant, & Wilton, Steve. (September 2017). Accelerating in-system FPGA debug of high-level synthesis circuits using incremental compilation techniques. Conference Proceedings. International Conference on Field Programmable Logic and Applications , IEEE.
  • Goeders, Jeffrey Brant. (May 2017). Enabling Long Debug Traces of HLS Circuits Using Bandwidth-Limited Off-Chip Storage Devices. Conference Proceedings. International Symposium on Field-Programmable Custom Computing Machines , IEEE.
  • Goeders, Jeffrey, & Wilton, Steven J.E.. (August 2016). Quantifying Observability for In-System Debug of High-Level Synthesis Circuits. Other. International Conference on Field Programmable Logic and Applications, .