Skip to main content
Jeff Goeders Picture

Jeff Goeders

Assistant Professor
Faculty

Office: 460G EB

Biography

Jeff Goeders received his BASc degree in Computer Engineering from the University of Toronto, Canada, in 2010, and MASc and PhD degrees in Computer Engineering from The University of British Columbia, Vancouver, Canada, in 2012 and 2016. He has worked at Bombardier Aerospace, PMC-Sierra, and Blackcomb Design Automation. He joined the Department of Electrical and Computer Engineering of Brigham Young University as an Assistant Professor in 2016. His research focuses on high-level design tools for reconfigurable computing devices, and technologies to improve the user design process. His research interests also include FPGA design tools, with a focus on debugging technologies, CAD algorithms, and power-aware design techniques.

Publications

  • Jamal, Al-Shahna, Goeders, Jeffrey Brant, & Wilton, Steven J.E.. (No date available). An FPGA Overlay Architecture Supporting Rapid Implementation of Functional Changes during On-Chip Debug. Conference Proceedings. .
  • Noronha, Daniel Holanda, Zhao, Ruizhe , Goeders, Jeffrey Brant, Luk, Wayne, & Wilton, Steven J. E.. (February 2019). On-chip FPGA Debug Instrumentation for Machine Learning Applications. Conference Proceedings. International Symposium on Field-Programmable Gate Arrays (FPGA), .
  • Bohman, Matthew , James, Benjamin, Wirthlin, Michael J, Quinn, Heather, & Goeders, Jeffrey Brant. (No date available). Microcontroller Compiler-Assisted Software Fault Tolerance. Journal Article, Academic Journal. IEEE Transactions on Nuclear Science, .
  • Ashcraft, Matthew, & Goeders, Jeffrey Brant. (December 2018). Unified On-Chip Software and Hardware Debug for HLS-Accelerated Programs. Conference Proceedings. International Conference on Field-Programmable Technology (FPT), .
  • Jamal, Al-Shahna, Goeders, Jeffrey Brant, & , . (27 August 2018). An FPGA Overlay Architecture Supporting Rapid Implementation of Functional Changes during On-Chip Debug. Conference Proceedings. International Conference on Field Programmable Logic and Applications (FPL), .
  • , Adam Hastings, Jensen, Sean, Goeders, Jeffrey Brant, & Hutchings, Brad L. (2 July (3rd Quarter/Summer) 2018). Assuring 3rd-Party IP for Modern FPGAs through Functional Comparison. Conference Proceedings. International Verification and Security Workshop, .
  • Goeders, Jeffrey Brant, Gaskin, Tanner, & Hutchings, Brad L. (April (2nd Quarter/Spring) 2018). Demand Driven Assembly of FPGA Configurations Using Partial Reconfiguration, Ubuntu Linux, and PYNQ. Conference Proceedings. International Symposium on Field-Programmable Custom Computing Machines, .
  • Jamal, Al-Shahna, Goeders, Jeffrey Brant, & Wilton, Steve. (February 2018). Architecture Exploration for HLS-Oriented FPGA Debug Overlays. Conference Proceedings. International Symposium on Field-Programmable Gate Arrays , ACM.
  • Bohman, Matthew, James, Benjamin, Wirthlin, Michael J, Quinn, Heather, & Goeders, Jeffrey Brant. (No date available). Microcontroller Compiler-Assisted Software Fault Tolerance. Conference Proceedings. IEEE Nuclear and Space Radiation Effects Conference, .
  • Bussa, Pavan Kumar, Goeders, Jeffrey Brant, & Wilton, Steve. (September 2017). Accelerating in-system FPGA debug of high-level synthesis circuits using incremental compilation techniques. Conference Proceedings. International Conference on Field Programmable Logic and Applications , IEEE.
  • Goeders, Jeffrey Brant. (May 2017). Enabling Long Debug Traces of HLS Circuits Using Bandwidth-Limited Off-Chip Storage Devices. Conference Proceedings. International Symposium on Field-Programmable Custom Computing Machines , IEEE.
  • Goeders, Jeffrey, & Wilton, Steven J.E.. (August 2016). Quantifying Observability for In-System Debug of High-Level Synthesis Circuits. Other. International Conference on Field Programmable Logic and Applications, .